LUBIS EDA Consulting Whitepaper

The only Formal Verification Consulting you need.

Formal verification is a must-have for you to find simulation-resistant and corner-case bugs in high-risk IP blocks. However, you may face a lack of experience or training.

That is why we offer an experienced formal verification service and formal verification training. Achieve the best results in time.

This consulting paper includes:

  • What LUBIS EDA’s formal verification service is and where it fits in chip development
  • How LUBIS structures projects from planning to formal sign-off
  • Why formal verification helps find hard-to-catch bugs earlier
  • What outcomes customers can expect: more predictability, lower risk, and clearer sign-off evidence
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Training Topics

  1. Abstraction vectors (time, functionality)
  2. AIP for protocols
  3. AIP orchestration
  4. BMC & IPG, invariants
  5. Codestyle
  6. Completeness
  7. Liveness property, safety property
  8. Non-determinism (abstraction technique)
  9. Response generation (abstraction technique)
  10. Scoreboard (abstraction technique)
  11. Signal cutting, blackboxing
  12. State space explosion and mitigation techniques
  13. SVA fundamentals
  14. Whitebox checking, blackbox checking, greybox checking
  15. Witness, vacuity, reachability

Become a leader in formal verification