Formal sign-off is becoming infrastructure

We are building the Formal Operating System for formal verification.

  • Platform-led delivery for more predictable sign-off
  • Orchestration for formal workflows instead of fragmented execution
  • Built from real project experience across 325+ delivered engagements

Where the market is going

Every formal services company will pass through the same four stages.

Formal verification services today operate on a model that has not fundamentally changed in twenty years. A customer needs a block verified. A specialist firm assigns engineers. The price, in the end, traces back to people × time.

And then AI agents come up and suddenly everyone dreams of jumping right to “Everything orchestrated by AI agents”.

The transformation arc formal verification services FOS (Formal verification platform) lives at Stage 04

We have lived inside Stage 1 for six years and 325+ projects. Therefore, we know its strengths, and we know where it stops scaling. Verification complexity is rising faster than the industry can train experts. Tape-out schedules are compressing. Customers no longer want to buy engineering hours — they want to buy a clearer, more predictable path to sign-off.

Every serious formal verification services company will travel through four stages on the way there. You cannot skip one of them. However, Stage 2 is the prerequisite for everything else and where the Formal Expertise will be encoded:

Without Stage 2, an encoded delivery model and workflow automation, there is nothing consistent to automate.

If you don’t encapsulate outcomes in Stage 3, then there are no automated capabilities and consequently nothing to orchestrate. The companies that complete the climb will define what formal verification looks like for the next generation, as an orchestration of various capabilities.

Consequently, the ones that stop at Stage 1 will compete on rate cards.

Why the shift is happening now

Three pressures are converging at the same time.

What looked like a slow industry evolution has become a structural shift. Stage 4 is no longer a long-term ambition. It is a near-term necessity for any company that wants to remain the team customers call first when formal MUST work on a real schedule.

Level i

Complexity is outpacing hiring

A senior formal verification engineer takes years to develop. The number of designs that require formal sign-off is rising sharply, e.g. AI accelerators, automotive SoCs, safety-critical IP. The industry cannot recruit its way out of this.

Level ii

Sign-off has become schedule-critical

Formal is increasingly applied to the high-risk blocks that could otherwise jeopardize tape-out. When the schedule depends on the verification result, “we’ll get there” is not an acceptable answer. The customer needs visibility, predictability, and a credible path.

Level iii

Orchestration has become feasible

What once looked like a future capability is becoming real: a formal verification platform that can reason across a verification plan, coordinate vendor tools, and improve with every project. The orchestration layer can be built. The real question is who builds it, and whether it becomes deeply integrated into the way chips are designed and verified.

The customer does not want formal support.
The customer wants a reliable IP sign-off timeline.

What stage 4 looks like

FormalOS: a formal verification platform for systemized sign-off

FOS is LUBIS EDA’s orchestration layer for formal verification. It runs on customer premises. It integrates the vendor formal tools the industry depends on — Cadence Jasper, Synopsys VC Formal, Siemens Questa Formal — alongside LUBIS EDA’s own capabilities. And it presents one clean interface to the customer, from planning through preparation, execution, and sign-off.

What this will change in practice:

Planning output feeds automatically into property generation.

Coverage gaps feed back into the verification plan.

Delta analysis runs automatically on a new RTL revision.

Solver configuration is handled by the formal verification platform system.

Results aggregate into a real-time sign-off-grade status view.

The engineer’s role changes with it.

Where today they operate three disconnected surfaces by hand — translating planning decisions into tool invocations, copying results into status updates, holding the project together — with FOS they supervise the system that does this for them, and spend their attention on the verification questions that actually require expert judgment.

Chip design itself will be orchestrated in the future. Platforms from Cadence, Synopsys, Siemens across development phases will coordinate the full design flow — simulation, FV, synthesis, linting, timing.

THE THREE-LEVEL STACK LUBIS EDA OWNS LEVEL 2
LEVEL 1

Chip Orchestrators

Architectural exploration RTL design Simulation Cognichip

calls for Formal Sign-Off
LEVEL 2 • LUBIS EDA

FOS — Formal Operating System

FV orchestration capabilities sign-off delivery

orchestrates
LEVEL 3

Vendor FV Tools / Apps

Cadence Jasper Synopsys VC Formal Siemens Questa Formal

Why LUBIS EDA is building it​

You cannot encode a process you have not lived.

The hardest part of building FOS is not the software. It is knowing exactly what a verification lead needs to do, when, and why — and which of those steps are worth automating and which are not. That knowledge is what LUBIS EDA has.

325+
Formal verification projects delivered
100%
Focus on formal verification
100+ yrs
Combined formal experience on the team
5
Fortune 25 customers trust our delivery

These numbers matter for one reason: they are evidence that LUBIS EDA has already done the harder, less visible work: the Stage 2 work of turning hero-based consulting into a repeatable delivery model.
Plan → Prep → Execute → Sign-off is not a slide but how we run every project, with 40+ engineers, across architectures and industries:

The LUBIS EDA Formal verification flow insight. For reproducible formal verification results

The Formal Sign-Off Orchestration is built on automated workflows along each of these steps. Without an encoded delivery model, the orchestration layer has nothing consistent to orchestrate. This is why FOS can be built by us. We have the delivery model the orchestration must be shaped around.
The tool vendors have the solvers. We have developed the delivery model the orchestration has to be shaped around.

The tool vendors have the solvers. We have developed the delivery model the orchestration has to be shaped around.

Where this leads

Sign-off as infrastructure.

The version of FOS we are building in 2026 is narrow on purpose. It focuses on the parts of a formal engagement with the most repeatable structure and the most coordination overhead — planning, preparation, and sign-off. Execution is deliberately out of scope this year.

Stage 2 first. Then the rest.

The destination is bigger.

A formal engagement today takes a senior expert days or weeks to scope and plan. We see a future where that scoping happens in hours, because the formal verification platform system has seen this kind of design before. Where a junior engineer can credibly do work that today requires a senior, because the planning intelligence lives in the system, not the person. Where formal sign-off becomes a predictable, schedule-anchored deliverable that chip-level orchestration platforms can call on with confidence.

That is what infrastructure looks like. It does not feel exceptional. It is reliable, repeatable, and trusted. It is the thing customers stop thinking about because it always works.

When formal must work on a real schedule, we want teams to think of LUBIS EDA first.
The Formal Verification platform FOS is how we make sure that is still true a decade from now.

Talk to us about formal on your next tape-out

If you are a chip team facing a hard formal problem on a real schedule, or a chip-level platform looking for a credible FV partner at Level 2, we’d like to hear from you.

Training Topics

  1. Abstraction vectors (time, functionality)
  2. AIP for protocols
  3. AIP orchestration
  4. BMC & IPG, invariants
  5. Codestyle
  6. Completeness
  7. Liveness property, safety property
  8. Non-determinism (abstraction technique)
  9. Response generation (abstraction technique)
  10. Scoreboard (abstraction technique)
  11. Signal cutting, blackboxing
  12. State space explosion and mitigation techniques
  13. SVA fundamentals
  14. Whitebox checking, blackbox checking, greybox checking
  15. Witness, vacuity, reachability

Become a leader in formal verification